Keys to Understanding Integrated Circuits

From Jargon to Performance and Cost Issues

Through this course, you will gain a comprehensive overview of the world of microchips (chips, integrated circuits) and its terminology in the age of nanoelectronics. You will learn to decipher acronyms and identify product families and technologies. You will understand the technical and economic impacts of fabrication technologies (technology nodes) and key metrics: area, power consumption, and performance.

Goals

  • Become familiar with the terminology of integrated circuits (ICs)
  • Learn about IC families and technologies
  • Understand the trade-off between power consumption, performance, and area to select the appropriate fabrication technology

Prerequisites

Fundamentals of Electronic Circuit Design

Moore’s Law

Speakers

B. PRADARELLI – Asteerics Project Manager for Cap’tronic – 20 years of experience in the semiconductor industry and teaching

Means

Teaching resources

Course Materials / Post-Training Support

Assessment methods

Satisfaction Survey

Monitoring and sanctions

Attendance Sheets / Attendance Certificate

Program

  • 14h00 - 14h30

    • Roundtable Discussion
    • Agenda Overview


  • 14h30-15h : microelectronics terminology

    • COTS, ASIC, ASSP, FPGA, SOC, SIP, Chiplet, CoWoS, PIC, MEMS,
    • Do not confuse an integrated circuit with a printed circuit board


  • 15h00 – 16h00 : Families of integrated circuits

    • Digital ICs (memory, microP, microC, CPU, MMU, GPU, processors, etc.),
    • Analog (amplifiers, etc.),
    • Mixed-signal (ADC, DAC),
    • RF (antennas, etc.),
    • Photonics: waveguides, radar
    • Converters (power electronics)


  • 16h00 – 16h15 : Break


  • 16h15 – 16h45 : Technologies: Si, FDSOI, SiC, GaN: Comparison, Markets, Products


  • 16h45 – 17h15 : The Concept of Technology Hubs: Technical and Economic Impacts


  • 17h15 – 17h45 : Key Metrics: Area, Consumption, Performance


  • 17h45 – 18h00

    • Satisfaction Survey
    • Roundtable Discussion


Dates

From 19 to 19 November

Location

Minalogic – 29, rue Félix Esclangon, 38000 Grenoble & Online

Duration

4h

Rates*

Base price: €400
Member price: €300

*Free training for eligible companies as part of the ASTEERICS project (EU and French grants).

 

Contact

Béatrice PRADARELLI
pradarelli@captronic.fr
06.98.22.20.51